This bit can be set or cleared by instructions in your ladder program. OL Output Limiting Enabled Bit (word 0, bit 3) This bit is set when you have selected to limit the control variable. This bit can be set or cleared by instructions in your ladder program.ĬM Control Mode Bit (word 0, bit 2) This bit is cleared if the control is E=SP-PV.
This bit can be set or cleared by instructions in your ladder program.ĪM Auto/Manual Bit (word 0, bit 1) Specifies automatic operation when it is cleared and manual operation when it is set. It is cleared when the STI mode is in effect. It is set when the TIMED mode is in effect.
Time Mode Bit TM(word 0, bit 0) Specifies the PID mode. Word 0 is broken up into bits, as per the following Word LSW Integral Sum 5/03/Micro 1500 LSW Integral Sum MSW Integral Sum 5/03/Micro 1500 MSW Integral Sum Noting that some of the text is taken from the help manual.Ĭontrol Word 0, bits 7 (DA – Derivative Rate Action bit) and 4 (RG – Reset and Gain Rate Enhancement bit)apply only to the SLC 5/03, SLC 5/04, and SLC 5/05 processors and to the MicroLogix 1500 controller. The following is bit and int setup data for setting up PID in an SLC.
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